A fault simulator that adopts an algorithm called "GODFATHER" created by Pier Paolo Ucchino
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Updated
Jan 2, 2020 - C
A fault simulator that adopts an algorithm called "GODFATHER" created by Pier Paolo Ucchino
Fault Simulation | Parallel Fault Simulation | Deductive fault Simulation | Test Coverage
A high-fidelity dynamic simulation framework.
RiscV Environment for Simulation (R4VES) is a generic and modular framework that eases the grunt work required in order to perform pre/post-synthesis logic and fault simulation on RISC-V cores based on Model/QuestaSim and Z01X.
This is a Combinational Circuit Logic Simulation Tool. There is a C++ version and a C version.
A serial and parallel logic fault simulator on gate level netlists.
Hardware Formal Verification
FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
A complete open-source design-for-testing (DFT) Solution
Litmus helps SREs and developers practice chaos engineering in a Cloud-native way. Chaos experiments are published at the ChaosHub (https://hub.litmuschaos.io). Community notes is at https://hackmd.io/a4Zu_sH4TZGeih-xCimi3Q
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