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22 Open 5 Closed
22 Open 5 Closed
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Issues list

Who wrote the FPGA code and is there any detailed documentation for it?
#95 opened Feb 1, 2024 by adnaneGdihi
1
unreachable code
#90 opened Sep 25, 2023 by maddin200
Enable second UART for snickerdoodle
#83 opened Jul 6, 2023 by twitzelbos
@twitzelbos
Setup binary validation good first issue Good for newcomers help wanted Extra attention is needed
#79 opened Apr 27, 2023 by twitzelbos
Implement IP core for control of ADS8168 good first issue Good for newcomers help wanted Extra attention is needed
#66 opened Mar 31, 2023 by twitzelbos
Create a UART core for custom serial interfaces routed via the PL help wanted Extra attention is needed
#65 opened Mar 31, 2023 by twitzelbos
snickerdoodle-black missing pins enhancement New feature or request good first issue Good for newcomers help wanted Extra attention is needed
#64 opened Mar 30, 2023 by twitzelbos
1
Update scripts to create platforms enhancement New feature or request help wanted Extra attention is needed
#63 opened Mar 30, 2023 by twitzelbos
Add board support files for Vitis documentation Documentation that is needed enhancement New feature or request
#62 opened Mar 30, 2023 by twitzelbos Multi-board OCRA
@twitzelbos
Write a documentation on how to configure networking on the ocra setups documentation Documentation that is needed good first issue Good for newcomers help wanted Extra attention is needed
#48 opened Mar 9, 2023 by twitzelbos
Build a sync interface to Siemens 10MHz clock enhancement New feature or request help wanted Extra attention is needed
#45 opened Mar 8, 2023 by twitzelbos
1
Build a continuous ASL labelling setup enhancement New feature or request help wanted Extra attention is needed
#44 opened Mar 8, 2023 by twitzelbos
Build an ARISE demo setup enhancement New feature or request help wanted Extra attention is needed
#43 opened Mar 8, 2023 by twitzelbos
Build a mock ocra-server enhancement New feature or request good first issue Good for newcomers help wanted Extra attention is needed
#42 opened Mar 8, 2023 by twitzelbos
Make the input channel on the Red Pitaya selectable enhancement New feature or request
#41 opened Mar 8, 2023 by twitzelbos
@twitzelbos
Setup Makefile and Ports to support multiple boards enhancement New feature or request help wanted Extra attention is needed
#38 opened Mar 7, 2023 by twitzelbos Multi-board OCRA
More Makefile cleanups enhancement New feature or request
#37 opened Mar 7, 2023 by twitzelbos Multi-board OCRA
@twitzelbos
Remove CIC compensation filter from FPGA to deal with unnecessary data delay
#31 opened Mar 1, 2023 by twitzelbos
Implement proper RX data packetization
#30 opened Mar 1, 2023 by twitzelbos
Add some basic documentation on how to build etc. documentation Documentation that is needed
#29 opened Mar 1, 2023 by twitzelbos Multi-board OCRA
@twitzelbos
How to change the dwell_time and acqusion_points during acquisition period?
#27 opened Dec 1, 2020 by BingwenHu
A question about the how to compute pulse width
#22 opened Apr 16, 2020 by davied9
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