SOP-ApproximateLogicSynthesis

This software performs Approximate Logic Synthesis of Sum Of Products forms as described on Shin, Gupta (2010). Furthermore, it uses a technique called bi-decomposition to rebuild the original function in a new 3-level form (AND-OR-AND) without approximation. The final number of literals is guaranteed to be less or equal than the original function. A reference on bi-decomposition can be found here.

You can find the results for this study on my bachelor thesis here (in Italian!).

Requirements

This software requires the cudd library (at least version 3.0) in order to perform efficiently basic operations on Boolean functions (you can download it here) and the Espresso logic minimizer installed on your system.

Building

Edit the Makefile CUDD_PATH = /YOUR/CUDD/PATH variabile with the path of your cudd installation and then execute

$ make all

Running

Once built execute the following command

$ ./main -g error input.pla

where error is the desidered error percentage for all the inputs as defined in Shin, Gupta (2010) and input.pla is the Boolean function in a PLA format.