Add VHDL extension

[rapgenic]

This PR implements an extension for the VHDL language using

• https://github.com/alemuller/tree-sitter-vhdl for the tree-sitter grammar
• https://github.com/VHDL-LS/rust_hdl as the language server
• the zed csharp extension as a reference

This is my first attempt at creating an extension, so any feedback is appreciated!

I'm also marking this as a draft, because I cannot test MacOS and Windows, plus I'd like to use it for a few days to iron out any problems (I wrote it in a few hours, so there might be some rough mistakes...).

[cla-bot]

We require contributors to sign our Contributor License Agreement, and we don't have @rapgenic on file. You can sign our CLA at https://zed.dev/cla. Once you've signed, post a comment here that says '@cla-bot check'.

[rapgenic]

@cla-bot check

[cla-bot]

The cla-bot has been summoned, and re-checked this pull request!

[rapgenic]

I am having some problems with symbol outline and multiple variable definitions in a single statement, as per the following example:

variable a, b : Integer;

When showing the outline, the b variable appears as a child of the a variable, see the following picture:

The current tree-sitter query for that node is:

(variable_declaration
    "variable" @context
    (identifier_list (identifier) @name)
) @item

I cannot find a way to make them appear as two distinct variables, with the correct alignment...